Project 02 of 04

Memory Rail PDN Optimization

Peak PDN impedance, target 10 mΩ
22 → 9 mΩ
Package-level droop, budget 30 mV
52 → 27 mV

01Setup

A 1.1 V memory rail with a 10 mΩ PDN target, a 30 mV droop budget, and a 3 A load step.

02Method

Optimized decoupling across 100 kHz–100 MHz.

03Result

Peak PDN impedance reduced from 22 mΩ to 9 mΩ.

Package-level droop reduced from 52 mV to 27 mV.

Before and after measurements against a limitPeak PDN impedance: 22 mΩ to 9 mΩ, target 10 mΩ. Package-level droop: 52 mV to 27 mV, budget 30 mVPeak PDN impedancetarget 1022 mΩ9 mΩPackage-level droopbudget 3052 mV27 mV
Illustration of reported results, not simulation output.